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NAND (NOT AND) Instruction

This instruction performs a logical NOT AND of the left (Data Bus) and right (B-Register) values, and stores the result in the Output Cache Register. The NAND instruction is the compliment of the AND, where each output bit is true only if both input bits are false.

Logical NOT AND Instruction

Usage Examples:

        Hex                Mnemonic                      Action

1460       ; NAND             Y NOT AND B -> OCR
1410       ; NAND             PC NOT AND B -> OCR
14A0       ; NAND             A NOT AND B -> OCR
14F0       ; NAND             OCR NOT AND B -> OCR

Updates when Executed:

  • ALU Output Cache Register
  • Zero Flag
  • Negative Flag