AND Instruction

This instruction performs a logical AND of the left (Data Bus) and right (B-Register) values, and stores the result in the Output Cache Register.

Usage Examples:

        Hex                Mnemonic                      Action

1CA0         ; AND             A AND B -> OCR
1C50         ; AND             X AND B -> OCR
1C30         ; AND             RAM AND B -> OCR
1CF0         ; AND             OCR AND B -> OCR

Updates when Executed:

• ALU Output Cache Register
• Zero Flag
• Negative Flag