Computer Design Plan - Overview
The <コ:彡 Computer is a fully 16-bit TTL device built from discrete 1970s and 1980s era electronics. The end-goal is a working, fully programmable computer with its own programming language, compilers, and storage systems. Hardware audio and video are planned, but will be implemented separately, once the main CPU is working and tested.
Version 1.0bis Overview/Features:
- Sliced 8-bit Data and Address Bus (all registers, memory locations, buses)
- 64KB RAM
- 32KB STACK
- 5-bus Design ("A", "B", "f(a,b)", "Address", and "Stack")
- Two Transfer Registers
- Four Accumulator Registers
- Four Arithmetic Operations (ADD, SUB, BUF, NOT, SHL)
- Six Logical Operations (AND, NAND, OR, NOR, XOR, XNOR)
- Six Additional Operations (NOP, MOV, INC, DEC, HLT, CLR)
- Sixteen Flags for conditional MOV operations
- Two Address Modes (PC, DAR)
Additionally, there will be bus headers for the "A" and "Address" buses.
Slices can be combined to make a 16-bit or 32-bit design.