Data Bus DEC Instruction
This ALU DEC instruction works on the Data Bus, and includes a source identifier, to make it easy to select the register or counter to decrement. For sequential decrements, the OCR should be used as it will take a single clock-cycle per decrement. Unlike the INC and DEC instructions listed separately, the ALU version will work on any register that is available on the Data Bus.
The Data Bus is the left or "A' side of the equation because of the Decrement and Shift-Left operations of the ALU. When performing sequential decrements or shifts, this will save a transfer operation to copy the Output Cache Register to the "A" register... the Output Cache Register can be used directly. Note that while a Decrement takes two clock cycles to update the original register, this decrement will work on any register.
Hex Mnemonic Action
0FA0 ; DEC (A) Data Bus (A) - 1 -> OCR
0FF0 ; DEC (OCR) Data Bus (OCR) - 1 -> OCR
0F50 ; DEC (X) Data Bus (X) - 1 -> OCR
Updates when Executed:
- ALU Output Cache Register
- Carry Flag
- Zero Flag
- Negative Flag